Accelerarea Hardware a conversiei spațiilor de culoare YUV-RGB pe procesoarele RISC-V

Abstract

This project involved the implementation and analysis of a hardware-software system designed to convert images from the YUV 4:2:2 format into the RGB 8:8:8 format. The system was developed using the BeagleV®-Fire development board, featuring a RISC-V processor and reconfigurable FPGA logic. Four distinct implementations of the conversion algorithm were approached and compared: a purely software approach executed on the processor and three hardware approaches implemented on the FPGA. The hardware implementations evolved gradually, starting with a simplified initial version based on the APB protocol, followed by an optimized version with an internal buffer, and culminating with an advanced implementation that utilizes a DMA Controller for direct and continuous memory access on the FPGA, concurrently employing AXI and APB protocols. The implementation of execution on the processor proved faster in the context of the used platform. However, this advantage does not necessarily reflect the superiority of the software architecture but rather the limitations imposed by the development board’s resources, particularly the bandwidth and clock frequency of the processor-FPGA communication bus. In on-board testing, data transfer via APB at 125 MHz introduces significant overhead, favoring the software solution where the RISC-V processor at 625 MHz can quickly fetch, convert, and write data to memory without the penalties of hardware communication. The project highlights the importance of reconfigurable logic in accelerating computationally intensive tasks, provided that the hardware platform has relevant resources in terms of parallel processing, bandwidth, and processor-FPGA communication. Additionally, the project emphasizes the relevance and importance of exploring RISC-V architectures in the academic environment, contributing to skill development and a deeper understanding of hardware-software interactions in complex embedded systems.