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Optimal Implementations of 8b/10b Encoders and Decoders for AMD FPGAs

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dc.contributor.authorPopa, Stefan
dc.contributor.authorIvanovici, Mihai
dc.contributor.authorColiban, Radu-Mihai
dc.date.accessioned2025-09-18T08:49:37Z
dc.date.issued2024-03-13
dc.description.abstract
dc.identifier.doi10.3390/electronics13061062
dc.identifier.issn2079-9292
dc.identifier.urihttps://repository.unitbv.ro/handle/123456789/1560
dc.publisherMDPI AG
dc.relation.ispartofElectronics
dc.titleOptimal Implementations of 8b/10b Encoders and Decoders for AMD FPGAs
dc.typeArticle
dspace.entity.typePublication
oaire.citation.issue6
oaire.citation.volume13

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